# S-type

{% hint style="info" %}
S-type instructions are used for store.
{% endhint %}

## S-Format Instruction Layout

<figure><img src="https://733403343-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2Fz6F38NLmIOefVEORubUB%2Fuploads%2Fgit-blob-c735a2aa0a88877c5f05579e48a54b6a5d05d1d4%2Fs-type.png?alt=media" alt=""><figcaption></figcaption></figure>

* Mem\[Reg\[rs1] + offset] <- Reg\[rs2]

{% hint style="warning" %}
**Immediate in two parts**

* Can't have both _rs2_ and _immediate_ in same place as other instructions
* RISC-V design decision is move low 5 bits of immediate to where rd field was in other instructions - keep rs1/rs2 fields in same place
  * register names more critical than immediate bits in hardware design
{% endhint %}

## I+S Immediate Generation

<figure><img src="https://733403343-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2Fz6F38NLmIOefVEORubUB%2Fuploads%2Fgit-blob-b4d700d3cbd762c90f087802405760ec9d0d01cf%2Fi%2Bs-immgen.jpg?alt=media" alt=""><figcaption></figcaption></figure>

* Just need a 5-bit mux between two positions where low five bits of immediate can reside in instruction
* Other bits in immediate are wired to fixed positions in instruction

## Store Instructions

<figure><img src="https://733403343-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2Fz6F38NLmIOefVEORubUB%2Fuploads%2Fgit-blob-299a9822819bb2440741c559361e3f577c5a3c4a%2Fs-type-instructions.png?alt=media" alt=""><figcaption></figcaption></figure>

## Adding `sw` to datapath

<figure><img src="https://733403343-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2Fz6F38NLmIOefVEORubUB%2Fuploads%2Fgit-blob-4b5726e8c23b1ada5785a4b0ccd9cb38855cf2a8%2Fdatapath4.jpg?alt=media" alt=""><figcaption></figcaption></figure>

{% hint style="info" %}
How to control the amount of bytes to write to memory?
{% endhint %}
