Build A RISC-V Chip From Scratch
Ctrlk
  • Tutorial
    • Overview
    • RISC-V Basics
    • Datapath
    • Single Cycle
    • Pipelined
  • Interfaces
    • Graphics
    • Serial Interface
  • Tools
    • Install vivado 24.1
    • Get started with vivado 24.1
    • Get started with quartus
    • FPGA build flow
    • Tcl
    • Verilog testbench
    • Open-source tools for FPGA development
      • iverilog
      • nextpnr
    • RISC-V Toolchain
  • Devices
    • Alinx AX7020
    • DE10-Stanard
  • Misc
    • Input Conditioning Circuits
    • Build A RISC-V Soft Core CPU
    • Introduction to FPGA
    • Clock Wizard
    • What is an IP core?
    • Test and Debug Soft Cores
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  1. Tools
  2. Open-source tools for FPGA development

nextpnr

  • github repository

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Last updated 1 year ago