Tcl

Preparation:

Add <install_path>/Vivado/<version>/bin directory to the PATH. Suppose the vivado is installed in linux at directory /tools/Xilinx/Vivado/2024.1, append the following line to ~/.bashrc and then run source ~/.bashrc.

export PATH="/tools/Xilinx/Vivado/2024.1/bin:$PATH"

Now, when you enter vivado at the command prompt, it will automatically runs vivado -mode gui to launch the Vivado IDE.

If you enter vivado -mode tcl, it will launch an interactive Tcl command shell. You can enter start_gui at the tcl prompt to launch the Vivado IDE and open the Vivado tool GUI.

Elaborate

source ./target.tcl -notrace

# Read Verilog source files
if {[string trim ${RTL}] ne ""} {read_verilog -v ${RTL}}

# Read user constraints
if {[string trim ${CONSTRAINTS}] ne ""} {read_xdc ${CONSTRAINTS}}

# Read memory initialization files
if {[string trim ${MIFS}] ne ""} {read_mem ${MIFS}}

# Only elaborate RTL (don't synthesize to netlist)
synth_design -top ${TOP} -part ${FPGA_PART} -rtl

# write_checkpoint doesn't work:
# Vivado% write_checkpoint -force z1top_post_elab.dcp
# ERROR: [Common 17-69] Command failed: Checkpoints are not supported for RTL designs

# Open the schematic visualization
start_gui

Synthesis

Implementation

Program

References

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