VGA
Recommend reading
It may be overwhelming to people who are first learning video connectors or interfaces. I highly recommend reading Chapter 9.4.2 of Harris & Harris DDCA. This chapter provides detailed explanations and HDL code examples that are crucial for understanding VGA.
Key points
VGA signals
We need 5 signals to drive a VGA monitor.
R, G and B (red, green and blue signals)
HS and VS (horizontal and vertical synchronization)
The R, G and B are analog signals, while HS and VS are digital signals.
Signal de (data enable, not shown in picture) is occasionally necessary, but most of the time it is not.
Important parameters
See more at https://projectf.io/posts/video-timings-vga-720p-1080p/.
- | 640x480 | 1280x720 |
---|---|---|
Horizontal Active Pixels | 640 | 1280 |
Horizontal Front Porch | 16 | 110 |
Horizontal Sync Width | 96 | 40 |
Horizontal Back Porch | 48 | 220 |
Horizontal Total Blanking | 160 | 370 |
Horizontal Total Pixels | 800 | 1650 |
Horizontal Sync Polarity | negative | positive |
Vertical Active Pixels | 480 | 720 |
Vertical Front Porch | 10 | 5 |
Vertical Sync Width | 2 | 5 |
Vertical Back Porch | 33 | 20 |
Vertical Total Blanking | 45 | 30 |
Vertical Total Pixels | 525 | 750 |
Vertical Sync Polarity | negative | positive |
Image a 640x480 @ 60Hz VGA monitor. What's the bandwith of it?
There are 640x480 pixels in one frame, and each pixel cantains 24bit RGB values. So The bandwith should be 640x480x24x60 bps, roughly 0.44Gbps. But remember we have off-screen area because of the horizontal and vertical blanking intervals (more precisely, horizontal and vertical front and back porches, horizontal and vertical synchronization). Our 640x480 frame is actually sent as an 800x525 frame. So the actual bandwith is roughly 0.6Gbps, but only %73 of it really transfers the data.
Generate VGA signals
A important concept is pixel clock, i.e., the number of pixels painted per clock. For example, a 640x480 @ 60Hz VGA monitor has pixel clock 800x525x60Hz = 25.2MHz (offscreen area is calculated as well).
Because the pixel clock is often different with the system clock, we need a pixel clock generator. We can use counter to do this, but more often we use PLL or MMCM IP cores. If we have pixel clock, then we can build hsync and vsync signals.
The following exmaple code demonstrate how to generate some of the important signals. (comes from simple_480.sv)
We specify sx and sy as 10 bits registers. You should change it to fit your own needs, otherwise it may not show anything. Try to explain why according to the code. (hint: sx overflow)
Top level design
Four stages:
Pixel Clock
Display Signals
Drawing Graphics
Video Output (VGA, HDMI, DisplayPort)
Try to answer the following questions, you may have your own answer.
Why "clk_pix" points to "Drawing Logic"? Are "sx" and "sy" enough?
Is the design pattern good? Why?
Better design patterns?
References
Last updated