Build A RISC-V Chip From Scratch
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    • Serial Interface
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    • Get started with quartus
    • FPGA build flow
    • Tcl
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      • iverilog
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      • RISC-V Toolchain Installation
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  • Devices
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    • DE10-Stanard
  • Misc
    • Input Conditioning Circuits
    • Build A RISC-V Soft Core CPU
    • Introduction to FPGA
    • Clock Wizard
    • What is an IP core?
    • Test and Debug Soft Cores
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  • U-Format Instruction Layout
  • U-Format Instructions
  • Adding U-Format instructions to datapath
  1. Tutorial
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U-type

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Last updated 9 months ago

U-Format Instruction Layout

U-Format Instructions

  • LUI - Load Upper Immediate

    • Reg[rd] = {imm, 12'b0}

  • AUIPC - Add Upper Immediate to PC

    • Reg[rd] = PC + {imm, 12'b0}

The combination of an AUIPC and the 12-bit immediate in a JALR can transfer control to any 32-bit PC-relative address, while an AUIPC plus the 12-bit immediate offset in regular load or store instructions can access any 32-bit PC-relative data address.

The current PC can be obtained by setting the U-immediate to 0. Although a JAL +4 instruction could also be used to obtain the local PC (of the instruction following the JAL), it might cause pipeline breaks in simpler microarchitectures or pollute BTB structures in more complex microarchitectures.

Adding U-Format instructions to datapath

What should be added to datapath?