Build A RISC-V Chip From Scratch
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      • R-type
      • I-type
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      • Draw an image using FPGA
    • Serial Interface
      • UART and FIFO
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  • Tools
    • Install vivado 24.1
    • Get started with vivado 24.1
    • Get started with quartus
    • FPGA build flow
    • Tcl
    • Verilog testbench
    • Open-source tools for FPGA development
      • iverilog
      • nextpnr
    • RISC-V Toolchain
      • RISC-V Toolchain Installation
      • RISC-V Toolchain Usage
  • Devices
    • Alinx AX7020
    • DE10-Stanard
  • Misc
    • Input Conditioning Circuits
    • Build A RISC-V Soft Core CPU
    • Introduction to FPGA
    • Clock Wizard
    • What is an IP core?
    • Test and Debug Soft Cores
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  • JALR (I-Format)
  • Adding JALR to datapath
  • JAL
  • Adding JAL to datapath
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J-type

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Last updated 6 months ago

JALR (I-Format)

I'm sorry for putting JALR here. Actually JALR is I-type.

  • JALR rd, rs1, imm

    • Reg[rd] <- PC + 4; PC <- Reg[rs1] + imm;

      • Write PC + 4 to Reg[rd] (return address)

      • Sets PC = Reg[rs1] + offset

Don't need to multiply the immediate by 2.

Adding JALR to datapath

JAL

  • JAL rd, imm

    • Reg[rd] <- PC + 4; PC <- PC + imm;

      • Write PC + 4 to Reg[rd] (return address)

      • Sets PC = PC + offset

Adding JAL to datapath

What should be added to datapath?