> For the complete documentation index, see [llms.txt](https://byrzhm.gitbook.io/build-a-risc-v-chip-from-scratch/llms.txt). Markdown versions of documentation pages are available by appending `.md` to page URLs; this page is available as [Markdown](https://byrzhm.gitbook.io/build-a-risc-v-chip-from-scratch/tutorial/datapath/s-type.md).
# S-type
{% hint style="info" %}
S-type instructions are used for store.
{% endhint %}
## S-Format Instruction Layout
* Mem\[Reg\[rs1] + offset] <- Reg\[rs2]
{% hint style="warning" %}
**Immediate in two parts**
* Can't have both *rs2* and *immediate* in same place as other instructions
* RISC-V design decision is move low 5 bits of immediate to where rd field was in other instructions - keep rs1/rs2 fields in same place
* register names more critical than immediate bits in hardware design
{% endhint %}
## I+S Immediate Generation
* Just need a 5-bit mux between two positions where low five bits of immediate can reside in instruction
* Other bits in immediate are wired to fixed positions in instruction
## Store Instructions
## Adding `sw` to datapath
{% hint style="info" %}
How to control the amount of bytes to write to memory?
{% endhint %}
